Semiconductor devices in which a semiconductor chip is flip-chip mounted on a wiring board having an interconnect layer and an insulating layer are known in the art. In such a structure, part of the interconnect layer serves as pads, which are soldered to the electrodes of the semiconductor chip. In some cases, a metal film or the like may be formed on the surface of the pads (see Patent Document 1, for example).
In the related-art wiring boards, the surface of an interconnect layer serving as pads and/or the surface of a metal film or the like formed on the pads is exposed at the same plane as (i.e., flush with) the surface of the insulating layer. Because of this, mounting a semiconductor chip on a wiring board may cause solder to flow out onto the insulating layer, resulting in a formation of a solder bridge between adjacent pads to create short-circuiting. This problem becomes more prominent as the interval between adjacent pads narrows, thereby lowering the reliability of insulation between pads.    [Patent Document 1] Japanese Patent No. 5003812